Implementation Real-Time ECG Feature Extraction Using FPGA
碩士 === 中原大學 === 生物醫學工程研究所 === 98 === The objective is to develop an algorithm for processing the electrocardiogram (ECG) signals that will be extracting the ECG features and to implement it using the FPGA as a testing prototype for System on Chip (Soc) design. The algorithm will be analyzing the com...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/73033282462503282882 |
| Summary: | 碩士 === 中原大學 === 生物醫學工程研究所 === 98 === The objective is to develop an algorithm for processing the electrocardiogram (ECG) signals that will be extracting the ECG features and to implement it using the FPGA as a testing prototype for System on Chip (Soc) design. The algorithm will be analyzing the component of the ECG signals and information in real time and to identify the abnormal rhythm and heart beat. The program controls the detection, analysis and monitoring of the LCD, USB and Flash Memory of the FPGA. Both the ECG signal in real time and the analyzed information can be displayed on the LCD panel. The information can be transmitted and presented using self-developed software that is designed with Borland C++ Builder through USB device.
The performance of algorithm was tested using MATLAB and valided based on the MIT-BIH Arrhythmia database which has been annotated by cardiologists. This overall detection tolerance of the algorithm was 0.02 seconds. The prototype system has been tested in real-time. The ECG signals from five volunteers were acquired, tested and analyzed and displayed in on line.
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