應用於複晶矽薄膜電晶體之表面電位模型
碩士 === 長庚大學 === 光電工程研究所 === 98 === Since the polycrystalline silicon thin film transistor (TFT) technology has been developed rapidly, devices becomes smaller so that device modeling should be improved. So we study the advanced model PSP. The surface potential model was modified to indicate the eff...
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2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/69204807535571853578 |
| Summary: | 碩士 === 長庚大學 === 光電工程研究所 === 98 === Since the polycrystalline silicon thin film transistor (TFT) technology has been developed rapidly, devices becomes smaller so that device modeling should be improved. So we study the advanced model PSP.
The surface potential model was modified to indicate the effect of grain boundary. A quasi-two-dimensional Poisson equation was solved to identify the effect of the charges trapped of grain boundary on the surface potential model in polycrystalline silicon TFT. Modify the surface potential model for the grain boundary parallel and longitudinal to the channel direction.
For the grain boundary longitudinal to the channel direction, the impact for the grain boundary is larger than that with parallel grain boundary. The identification of grain boundary has been treated as an effective doping in the surface potential model.
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