Effect of gold nanoparticle buffer layer and Nano Composite Conjugate Polymer on characteristics of P3HT thin film transistors

碩士 === 國立中正大學 === 光機電整合工程所 === 98 === This thesis aims to investigate the effects of gold nanoparticles (Au-NPs) on the performance of organic thin-film transistors (OTFTs). This study is accomplished through two approaches: one is introducing the Au-NPs as a buffer layer, in between the dielectric...

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Bibliographic Details
Main Authors: Yan-Heng Cheng, 陳彥亨
Other Authors: JENG-RONG HO
Format: Others
Language:zh-TW
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/55706768396316306124
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Summary:碩士 === 國立中正大學 === 光機電整合工程所 === 98 === This thesis aims to investigate the effects of gold nanoparticles (Au-NPs) on the performance of organic thin-film transistors (OTFTs). This study is accomplished through two approaches: one is introducing the Au-NPs as a buffer layer, in between the dielectric and the semiconducting layers; and, the other is blending the newly synthesized nanocomposites, P3HT-Au, into the P3HT matrix as the OTFTs’ semiconducting layer. Results show, with introducing the negatively charged Au-NPs buffer layer, the electric field can be enhanced that induces more hole carriers and results in apparent increase in saturated drain currents. Consequently, the devices’ characteristics are effectively improved: the mobility and on/off ratio are increased and the threshold voltage is reduced. On the other hand, the experiments for the second approach show that the blended P3HT-Au can be dispersed uniformly in the P3HT matrix and the drain currents enhance obviously for the devices with the P3HT-Au blending. Here, the energy band diagrams of the polymers of P3HT blending with and without P3HT-Au are measured by the cyclic voltammetry that serve as the theoretical basis for elaborating on the devices’ performance enhancement. Both procedures for fabricating the Au-NPs as the buffer layer and the P3HT-Au in the P3HT matrix are solution processable. They are very straightforward and compatible to the other fabrication steps as well as are executable at room temperature and in the ambient environment. And, most importantly, results demonstrate both approaches can enhance device performance effectively.