Design of a Multicore Processor with NUCA & Single-Cycle Ring and its Prototyping on Stacked FPGA
碩士 === 國立中正大學 === 資訊工程所 === 98 === This thesis summarizes the implementation of a multicore system based on the “non-uniform cache architecture (NUCA)” and the “single-cycle ring” on-chip interconnect. “Starvation avoidance” & “atomic instructions” have been thoroughly discussed & incorporat...
Main Authors: | Hsuan-Po Cheng, 鄭軒博 |
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Other Authors: | none |
Format: | Others |
Language: | en_US |
Published: |
2010
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Online Access: | http://ndltd.ncl.edu.tw/handle/10219391184305096944 |
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