An Integer Motion Estimation IP Core Design Supporting Adaptive Search Range for H.264/SVC/Multi-View Video Coding

碩士 === 國立中正大學 === 資訊工程所 === 98 === This thesis presents a low memory bandwidth, low complexity, and high quality supporting adaptive search range (ASR) integer motion estimation (IME) algorithm and IP for multiple video coding applications. The proposed design is based on a low memory bandwidth and...

Full description

Bibliographic Details
Main Authors: Chang-Hung Tsai, 蔡長宏
Other Authors: Jiun-In Guo
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/88784080618326760449
Description
Summary:碩士 === 國立中正大學 === 資訊工程所 === 98 === This thesis presents a low memory bandwidth, low complexity, and high quality supporting adaptive search range (ASR) integer motion estimation (IME) algorithm and IP for multiple video coding applications. The proposed design is based on a low memory bandwidth and low computational complexity algorithm which saves about 80% of memory bandwidth and reduces over 90% of computational complexity with negligible quality loss as compared to the full search block matching algorithm (FSBMA). Moreover, we proposed the mechanism of group of macroblock (GOMB) and GOMB-based ASR to save the memory bandwidth and reduce the computational complexity. According to UMC 90nm CMOS technology, the proposed design costs 321.5K gates. The maximum operating frequency of the proposed design is 230MHz and it can achieve real-time motion estimation on D1, HD720, Full HD, and QFHD videos operated at 15, 39, 86, and 208MHz, respectively.