| Summary: | 碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 97 === The major research of this thesis can be divided into two parts. In the first part shows the new hysteresis-current-controlled buck converter. It contains some sub-circuiths, inclusive of a power MOS, a current sensing circuit, a sample and hold circuit, a hysteresis-current comparator circuit, a non-overlapping circuit, a driving circuit, a compensator circuit and a zero current detector circuit. The current sensing circuit can fully sense the inductor current and the zero current detector circuit improves effectively at the light load. The proposed circuits have been implemented with TSMC 0.35μm DPQM CMOS processes and the chip area is 0.888mm x 0.949mm with PAD.
In the second part of this thesis, the LDO building block includes an error amplifier, a pass element, an off-chip capacitor and resistors. The error amplifier is used to detect the reference and the feedback voltages. It is generated an output voltage proportional to the difference between these two voltages (reference and feedback voltages), which in turn biases the pass transistor through a base driver circuit. The error amplifier and driver circuit base negative feedback loop that maintains the regulator output voltage at the desired level. Voltage regulators can be used in SOC usually need fast transient response and low power consumption. The current feedback for fast response is provided by Current conveyor II (CCII) based on LDO.
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