Minimization of Output Voltage Ripple for Fully-Digitalized Interleaved Buck Converter
碩士 === 國立臺北科技大學 === 電機工程系所 === 97 === In this thesis, minimization of the output voltage ripple is presented based on the pulse width modulation (PWM) along with the pulse amplitude modulation (PAM), and applied to a DC-DC buck converter with the input voltage of 48V±20% and the rated output voltage...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/b49aev |