| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 97 === The High speed video camera is generally used in industry, academia to study high speed event. But expensive for mostly user, our purpose is cost down the high speed video camera system. In fact, the Stanford Computer Graphic Laboratory has developed a “Stanford Multiple Camera Array” architecture and provided a good result in 2001 [1]. However, the scale of the hardware architecture in their design is too large to be implemented as a portable device. Therefore, we decided to realize the system by reducing the architecture with an embedded platform.
On this concept, we have redesigned the high speed video camera system based on SoPC platform in [3][4]. Previous effort of our lab has achieved 120fps frame rate. In order to improve frame rate and system performance further, we keep developing the system. In this paper, we has 8 CMOS cameras in our system and frame rate could achieve 480fps. To improve the system execution time, we modify the auto-exposure algorithm to reduce the counts of exposure up to 31.17% and alter the displacement error rectification algorithm to diminish the complexity of displacement.
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