| Summary: | 博士 === 國立臺灣大學 === 電信工程學研究所 === 97 === The purpose of this dissertation is to develop the reduced-size Marchand-rat-race hybrid design and its application of the mixers and modulators using commercial standard GaAs based HEMT and Si based CMOS MMIC processes.
In this dissertation, the analyses and systematic design procedures of the Marchand balun with the coupling coefficients and load impedances selection method are proposed. The reported analyses and design procedures of the Marchand baluns only cover bandwidth or load impedance effect at center frequency. Our approach, for the first time, takes the coupling coefficient, electric length, and load impedances in the whole frequencies into consideration in the design procedures. Moreover, the design flow of the new type of the reduced-size Marchand-rat-race hybrid is developed, including the in-phase divider design.
Using the design flow as discussed above, the reduced-size Marchand-rat-race hybrids which are often used in balanced circuits can be implemented in IC process. CMOS reduced-size rat-race hybrids using Marchand baluns are implemented in four 60GHz CMOS mixers, including one single-balanced gate mixer, one single-balanced diode mixer, and two double-balanced gate mixers. To the author’s knowledge, this is first attempt to design the double balanced gate mixer in CMOS IC process. They are designed to reduce the LO-to-IF leakage to avoid saturating the high gain IF chain and further improve the LO-to-RF isolation. The other one GaAs reduced-size rat-race hybrid using Marchand baluns is used in a 60GHz GaAs single-balanced diode mixer. The single-balance CMOS and GaAs pHEMT diode mixer chips are realized using the classical 180o single-balance diode mixer topology included the rat-race hybrid. Unlike other reported the rat-race diode mixer chips, our chips have the compact chip areas due to the small area of the reduced-size rat-race hybrids using Marchand baluns, and can have a symmetric layout with less cross-over interconnections. These single- and double-balance mixers, no matter passive or active, all demonstrate good LO-to-RF isolations comparable to the double-balance mixers with the low dc consumption, lower LO power and compact chip size.
The reduced-size rat-race hybrids are used in three 30-50 GHz QPSK Kowari modulator ICs, including one 0.18-um CMOS QPSK Kowari modulator, one 0.13-um CMOS QPSK Kowari modulator, and one 0.15-um GaAs mHEMT QPSK Kowari modulator. The CMOS reduced-size Marchand baluns, which designed following the design procedures of reduced-size Marchand balun, are used in two 60-GHz CMOS resistive ring QPSK modulators. Our modulator designs all have zero dc power consumption, except last design with output buffer amplifiers, and low spurious response in broad bandwidths. Moreover, all the circuits have the compact size compared the same type of mixers in the similar IC processes due to the reduced-size Marchand-rat-race hybrids or Marchand baluns. The other 60 GHz 90-nm CMOS resistive ring IQ modulator with the common-mode rejection buffer demonstrates the LO leakage and spurious signal suppression capability. These chips demonstrate that the Kowari reflection-type modulators and resistive ring modulators are suitable for the compact-size millimeter-wave IQ modulators and phase shifters in wireless communication systems.
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