| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 97 === This thesis focuses on design of 60-GHz integrated circuits and antennas, which must be used for high-speed wireless transmission. Although such high frequency circuits only implemented in III-V compound semiconductor in the past, nowadays, gaining the advantage of Moore''s law sustained, CMOS transistors with cut-off frequencies above 100 GHz turn out to be the best candidate for mm-Wave integrated circuits, for its familiar with digital circuits and integrated systems.
Design considerations for 60-GHz wireless transmission would be discussed first. Describe many challenges in design of mm-Wave circuits in silicon and interface. And then we would present a fully-integrated 60-GHz transceiver system with on-board antenna assembly. Incorporating on-off keying (OOK) modulation and low-cost antenna design, this prototype provides a low-power solution for several Gb/s wireless communications. The enhanced OOK modulator/demodulator obviates baseband and interface circuitry, revealing a compact solution. Two antenna structures, folded dipole and patch array, are employed to fully examine the performance. Connecting to chip with bond wires, we use some techniques to alleviate the impedance issues. This design is fabricated in digital 90-nm CMOS technology; the transmitter and the receiver consume 183 and 103 mW and occupy 0.43 and 0.68 mm^2, respectively. With folded dipole antenna, the transceiver demonstrates error-free operation (BER < 10−12) for 2^31 − 1 PRBS of 1.5 Gb/s over a distance of 6 cm. With 4 × 3 patch antenna arrays, the transceiver achieves error-free operation (BER < 10^−12) for 2^31 − 1 PRBS of 1 Gb/s over a distance of 61 cm. Finally, we also design the antenna on board suitable for flip-chip interconnections, which is convinced of more compact solution.
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