Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application

碩士 === 國立清華大學 === 電子工程研究所 === 97 === In this study, a novel logic One-Time-Programmable (OTP) cell using Step Gate Oxide of Anti-Fuse (SGAF) with fast programming was demonstrated by nano-meter CMOS logic processes for advance logic NVM’s applications. The silicon data has proven that this cell can...

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Main Authors: Wu, Tai-Yi, 吳泰億
Other Authors: King, Ya-Chin
Format: Others
Language:zh-TW
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/54286077404663517397
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spelling ndltd-TW-097NTHU54280182015-11-20T04:19:10Z http://ndltd.ncl.edu.tw/handle/54286077404663517397 Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application 新穎梯形閘極氧化層反熔絲記憶元件應用於奈米製程技術 Wu, Tai-Yi 吳泰億 碩士 國立清華大學 電子工程研究所 97 In this study, a novel logic One-Time-Programmable (OTP) cell using Step Gate Oxide of Anti-Fuse (SGAF) with fast programming was demonstrated by nano-meter CMOS logic processes for advance logic NVM’s applications. The silicon data has proven that this cell can be adapted in both 90nm & 65nm technology nodes. The SGAF cell features complete compatibility to logic process without any additional change in process or mask layers. Gate oxide rupture is used as programming mechanism for the SGAF memory cell. The unique design in this cell is creating a oxide thickness difference in this step gate oxide formation. This cell can be programmed under 4V within 10us, while this low programming voltage can greatly reduce the power consumption as well as complexity in the peripheral circuits. As the breakdown of gate oxide is used as the programming method in SGAF array memory cell, this device is expected to scale better in advance technologies. King, Ya-Chin Lin, Chrong-Jung 金雅琴 林崇榮 2009 學位論文 ; thesis 84 zh-TW
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language zh-TW
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description 碩士 === 國立清華大學 === 電子工程研究所 === 97 === In this study, a novel logic One-Time-Programmable (OTP) cell using Step Gate Oxide of Anti-Fuse (SGAF) with fast programming was demonstrated by nano-meter CMOS logic processes for advance logic NVM’s applications. The silicon data has proven that this cell can be adapted in both 90nm & 65nm technology nodes. The SGAF cell features complete compatibility to logic process without any additional change in process or mask layers. Gate oxide rupture is used as programming mechanism for the SGAF memory cell. The unique design in this cell is creating a oxide thickness difference in this step gate oxide formation. This cell can be programmed under 4V within 10us, while this low programming voltage can greatly reduce the power consumption as well as complexity in the peripheral circuits. As the breakdown of gate oxide is used as the programming method in SGAF array memory cell, this device is expected to scale better in advance technologies.
author2 King, Ya-Chin
author_facet King, Ya-Chin
Wu, Tai-Yi
吳泰億
author Wu, Tai-Yi
吳泰億
spellingShingle Wu, Tai-Yi
吳泰億
Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application
author_sort Wu, Tai-Yi
title Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application
title_short Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application
title_full Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application
title_fullStr Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application
title_full_unstemmed Novel Anti-Fuse with Step Gox Structure for Nano CMOS Logic Technology Application
title_sort novel anti-fuse with step gox structure for nano cmos logic technology application
publishDate 2009
url http://ndltd.ncl.edu.tw/handle/54286077404663517397
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