Design of the Low-Density Parity-Check CODEC for Non-Volatile Memories
碩士 === 國立清華大學 === 資訊工程學系 === 97 === In this thesis, we evaluated the existing technologies of LDPC (low-density parity check) codes for the error correcting scheme of the non-volatile memories. With the consideration of the cost-effectiveness, the ¼-matrix approach has been adopted for the parity-ch...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/81646210630842251429 |