三維金屬線電容模擬應用於晶片外高效能設計
碩士 === 國立清華大學 === 資訊工程學系 === 97 === As technology process getting smaller and smaller, many companies make effort in signal integrity of SoC (System-on-chip) and SiP (System-in-Package) interconnects in order to improve the yield. Both SoC and SiP are critical now, compare SoC with SiP, SiP includes...
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| Format: | Others |
| Language: | zh-TW |
| Online Access: | http://ndltd.ncl.edu.tw/handle/68561197479596860023 |