Log-Domain Filter Based on CMOS Pseudo Exponential circuit

• Main Authors: Jia-sheng Chen, 陳加昇
• Other Authors: Chia-Hsiung Kao
• Format: Others
• Language: en_US
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/kgt366

碩士 === 國立中山大學 === 電機工程學系研究所 === 97 === On traditional filters, we usually need a trade off between low-voltage and high dynamic range. The companding filters may solve this problem. This thesis presents a pseudo-exponential third-older low pass filter. All MOSFETs are operated in saturated region to obtain high frequency. The filter has small chip area and less MOSFETs. The filter has supply voltage of 3V, has cutoff frequency of 3MHz to 10MHz, and 1.06mW power dissipation. We will first employ Hspice to simulate the log-domain filter to ensure the correctness of the circuit and make it a reliable reference with the circuit layout. After summarizing all the simulations and analyses, the chip has been fabricated with 0.35um CMOS technology.