The Implementation Architectures of Synchronous and Asynchronous Turbo Decoders

碩士 === 國立高雄第一科技大學 === 電子與資訊工程研究所 === 97 === In communication systems, In order to search for lower power consumption, faster transmission speed and smaller size of the production area, thus derived many of different solutions such as change coding ways, circuit manufacturing process improvements. In...

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Bibliographic Details
Main Authors: Kun-yuan Huang, 黃琨元
Other Authors: Shou-sheu Lin
Format: Others
Language:zh-TW
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/61032979336025539347
Description
Summary:碩士 === 國立高雄第一科技大學 === 電子與資訊工程研究所 === 97 === In communication systems, In order to search for lower power consumption, faster transmission speed and smaller size of the production area, thus derived many of different solutions such as change coding ways, circuit manufacturing process improvements. In the traditional communication systems, the circuit design of the computing architecture is using synchronization method to achieve. However, in today''s circuit design, clock speed of the demand is upgrading, structure of the circuit design complexity increases. These demands will be problems had lead to the overall transmission delay clock, power consumption and high integration of circuits on the scheduling. These issues have implications for the design of synchronous circuits more difficult to solve. Therefore, in the circuit design has to find solutions in asynchronous circuits. The traditional asynchronous circuit in control circuit design is complex and difficult, in order to reduce the complexity and solve design problems. In this paper, using state machines to complete the asynchronous handshake agreement, and then using synchronous and asynchronous hybrid structure to complete circuits. In this paper, it will explore how to design the asynchronous circuits based on synchronous circuits and applied to Turbo decoder. Using Balsa development tools to assist asynchronous design. Using VHDL code to implementation Architectures of synchronous and asynchronous Turbo decoder, and then using Modelsim tool to simulation and verify the operation is correct or not. Finally, using Altera''s Quartus II to do the circuit area, power consumption and speed of analysis and discussion.