Testable Design and Tolerance Analysis of Motion Estimation Computing Array

碩士 === 國立東華大學 === 電機工程學系 === 97 === In more recent years, there has been a dramatic proliferation of research concerned with multimedia technology application, such as video coding system. The motion estimation is central and important part in video coding system. However, the video coding systems a...

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Bibliographic Details
Main Authors: Chen-Jen Yang, 楊震仁
Other Authors: Chun-Lung Hsu
Format: Others
Language:zh-TW
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/12096016538696966163
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Summary:碩士 === 國立東華大學 === 電機工程學系 === 97 === In more recent years, there has been a dramatic proliferation of research concerned with multimedia technology application, such as video coding system. The motion estimation is central and important part in video coding system. However, the video coding systems are implemented by using hardware which is susceptible to influence of process variation and deep submicron. The process variation and deep submicron incurred the low yield-rate. Thus, a recent surge of research on low yield-rate has given new opportunities and challenges. This thesis proposed an efficient error tolerance methodology to analyze and estimate the faults occurred at interconnect channel within motion estimation in video coding system. Based on human visual system and proposed error tolerance methodology, the faults introduced at interconnect channel in motion estimation can be efficiently detected and analyzed. In other words, the proposed error tolerance methodology is based on accepting performance degradation which can lead to increase in whole effective-yield. Additionally, the results of fault detection can be further analyzed to show the ability of error tolerance. In terms of performance evaluation, some standard video sequences are selected to verify the feasibility of the proposed error tolerance methodology that has good performance in increasing effective yield and capability of error tolerance.