The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment

碩士 === 國立彰化師範大學 === 光電科技研究所 === 97 === In this study, we investigated the different surface treatments effects on the interface states of the pentacene-based thin-film transistor (TFT) with SiO2 as the gate insulator. We also extracted the interface states of the pentacene/SiO2 interface through con...

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Main Authors: Ming-Yuan Hong, 洪明源
Other Authors: Yu-Wu Wang
Format: Others
Language:zh-TW
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/95071435560159041186
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spelling ndltd-TW-097NCUE56140112015-10-13T12:06:22Z http://ndltd.ncl.edu.tw/handle/95071435560159041186 The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment 表面處理對五環素薄膜電晶體界面能態特性影響之研究 Ming-Yuan Hong 洪明源 碩士 國立彰化師範大學 光電科技研究所 97 In this study, we investigated the different surface treatments effects on the interface states of the pentacene-based thin-film transistor (TFT) with SiO2 as the gate insulator. We also extracted the interface states of the pentacene/SiO2 interface through conductance method. In the first part, we investigated the improvement of electrical characteristics and interface states of pentacene/SiO2 interface with different surface treatments. The threshold voltage and off current of HMDS-treated OTFT would better than untreated OTFT, but the interface trap density has no significant change. The electrical characteristics and the interface states of pentacene/SiO2 interface of OTS-treated and PETS-treated OTFT would better than untreated OTFT. Thus, we observe significant change of the interface states properties of pentacene-based OTFT through surface treatments. In the last part, we respectively investigated the electrical characteristics and interface states of pentacene-based TFT with SiO2 or PVP as the gate insulators in various measurement environments. The electrical characteristics become quite bad under illumination. The hysteresis of the C-V curve and interface trap density decrease under illumination. In 50°C, the electrical characteristics of the pentacene-based TFT with SiO2 gate insulator were found better than other temperature situations. The electrical characteristics and the hysteresis effect of the C-V curve become poor if the temperature is too high. In the same way, the electrical characteristics of the pentacene-based TFT with PVP gate insulator become poor under high temperature. When the temperature achieved 100°C, the hysteresis of the C-V curves met a reverse phenomenon from clockwise to counterclockwise. In a short summary, the operation environments and structure components of pentacene TFTs seriously affect its electrical-optical properties. In this literature, there are still many mechanisms unclear and need more investigation. Yu-Wu Wang 王右武 2009 學位論文 ; thesis 134 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立彰化師範大學 === 光電科技研究所 === 97 === In this study, we investigated the different surface treatments effects on the interface states of the pentacene-based thin-film transistor (TFT) with SiO2 as the gate insulator. We also extracted the interface states of the pentacene/SiO2 interface through conductance method. In the first part, we investigated the improvement of electrical characteristics and interface states of pentacene/SiO2 interface with different surface treatments. The threshold voltage and off current of HMDS-treated OTFT would better than untreated OTFT, but the interface trap density has no significant change. The electrical characteristics and the interface states of pentacene/SiO2 interface of OTS-treated and PETS-treated OTFT would better than untreated OTFT. Thus, we observe significant change of the interface states properties of pentacene-based OTFT through surface treatments. In the last part, we respectively investigated the electrical characteristics and interface states of pentacene-based TFT with SiO2 or PVP as the gate insulators in various measurement environments. The electrical characteristics become quite bad under illumination. The hysteresis of the C-V curve and interface trap density decrease under illumination. In 50°C, the electrical characteristics of the pentacene-based TFT with SiO2 gate insulator were found better than other temperature situations. The electrical characteristics and the hysteresis effect of the C-V curve become poor if the temperature is too high. In the same way, the electrical characteristics of the pentacene-based TFT with PVP gate insulator become poor under high temperature. When the temperature achieved 100°C, the hysteresis of the C-V curves met a reverse phenomenon from clockwise to counterclockwise. In a short summary, the operation environments and structure components of pentacene TFTs seriously affect its electrical-optical properties. In this literature, there are still many mechanisms unclear and need more investigation.
author2 Yu-Wu Wang
author_facet Yu-Wu Wang
Ming-Yuan Hong
洪明源
author Ming-Yuan Hong
洪明源
spellingShingle Ming-Yuan Hong
洪明源
The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment
author_sort Ming-Yuan Hong
title The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment
title_short The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment
title_full The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment
title_fullStr The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment
title_full_unstemmed The Study on the Interface State Properties of Pentacene Thin Film Transistors with Surface Treatment
title_sort study on the interface state properties of pentacene thin film transistors with surface treatment
publishDate 2009
url http://ndltd.ncl.edu.tw/handle/95071435560159041186
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