Design of a Low-power Content Addressable Memory with Current Self-adjusted Mechanism

• Main Authors: Yung-Shiang Lin, 林雍翔
• Other Authors: Meng-Chou Chang
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/86403611232242154557

碩士 === 國立彰化師範大學 === 電子工程學系 === 97 === Abstract In a traditional NOR-type content-addressable memory (CAM), the power consumption of match lines accounts for one major component of the total power consumption. This paper proposes a novel CAM architecture with a new current-saving match-line sensing mechanism. In the proposed architecture, each data row of the CAM has its own virtual match line (VML) and virtual ground line (VGL), and the comparison cells for one data row behave as switches between the corresponding VML and VGL. If the data in the current row is matched with the search key, all switches between VML and VGL are turned off, and VML are charged by a current source to a higher voltage than VGL to indicate the case of data match. If the data in the current row is different from the search key, at least one switch between VML and VGL is turned on, and the charging current for VML will be reduced by a self-adjusted mechanism to avoid excessive power consumption. Also, a dummy data row is placed in the proposed CAM architecture to turn off the current sources after a specific search period. Experiment results have shown that our CAM architecture can achieves 29.675% reduction in power consumption compared to the traditional NOR-type CAM. Keywords: Content-Addressable Memory、virtual match line (VML)、virtual ground line (VGL).