Automatic Process Sensitivity Reduction for OTA Circuits
碩士 === 國立中央大學 === 電機工程研究所 === 97 === With the advance process technology, process variation has more and more impacts on the device behaviors, which reduces the design yield dramatically. In order to solve this problem, design-for-yield (DFY) techniques are hot research topics recently. In the DFY d...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/w9xpg7 |