Quadratic Differential and Integration Technique in V2 Control Buck Converter with Small ESR Capacitor

碩士 === 國立交通大學 === 電機與控制工程系所 === 97 === With the advance of the portable device, to supply a stable and noiseless source has become a more and more important issue of power management module. Besides, some operation mode as idle is designed to economic the power consumption. That means the power mana...

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Bibliographic Details
Main Authors: Wang, Shih-Jung, 王士榮
Other Authors: Chen, Ke-Horng
Format: Others
Language:en_US
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/24116604750994797654
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Summary:碩士 === 國立交通大學 === 電機與控制工程系所 === 97 === With the advance of the portable device, to supply a stable and noiseless source has become a more and more important issue of power management module. Besides, some operation mode as idle is designed to economic the power consumption. That means the power management should response rapidly between the modes change. To overcome demand, the V2 control structure has been widely used because of the fast transient response. However, the conventional V2 control requires large ESR of the output capacitor and that would cause large output voltage ripple which would affect the performance of applications. This thesis proposes a quadratic differential and integration (QDI) technique for the design of V2 control buck converters with small equivalent series resistance (ESR) of the output capacitor. The QDI technique, which eliminates the use of large ESR in the V2 control structure, achieves the fast transient response with the small output voltage variation in transient period. Besides, the precise sensing signal is derived from the QDI circuit without the unwilling ESR-related distortion. Moreover, the loop analysis demonstrates that the proposed QDI circuit and the PI compensator can generate the compensation zero pair to stabilize the system. Experimental results show that the output voltage has small voltage ripple opposite to the conventional V2 control. In load transient period, the overshoot/undershoot voltage is smaller than 40 mV, and the transient recovery time inheriting the advantage of V2 control is shorter than 9 μs of a 300 mA load step. The highest full chip power conversion efficiency is about 93 %.