| Summary: | 碩士 === 國立交通大學 === 電機學院碩士在職專班電信組 === 97 === This article analyzes the frequencies synthesis techniques of synthesizers. The strength and shortcoming of major properties, such as frequency step, frequency switching speed, phase noise and spurious level are be discussed .
The conventional synthesis technique of PLL compromise the short frequency switching time for the purity of output waveform(such as phase noise, spurious, phase error).
In order to achieve output waveform with low phase noise , and low spurious level and fast frequency switching speed, we compromise the volume and utilize the direct analog coherent synthesis method to implement the synthesizer.
By utilizing the extreme low phase noise crystal oscillator, and high speed frequency with very low phase noise divider IC , high speed switch, and high order filter circuit, we implement specs such as fast frequency switching time (under 1us), low phase noise, high output power and low spurious level (under 55dBc), low harmonics level(under 55dBc).
In order to prevent the shortcomings of large volume caused by direct analog coherent synthesis and reduce the frequency step, the synthesis utilize iterated identical stages circuit designed with combinations of filters , switches, and dividers realize the synthesizer. We can lower the volume and reduce the difficulty in maintenance.
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