Millimeter-Wave HEMT Transceiver With Analog Circuit Design Approach and Flip-Chip Technology

• Main Authors: Su, Jen-Yi, 蘇珍儀
• Other Authors: Meng, Chin-Chun
• Format: Others
• Language: en_US
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/97557622070013790980

博士 === 國立交通大學 === 電信工程系所 === 97 === In this dissertation, all analog integrated circuits and monolithic microwave integrated circuits (MMICs) are demonstrated using 0.15-�慆 pseudomorphic high electron mobility transistor (pHEMT) and metamorphic high electron mobility transistor (mHEMT) technologies. These GaAs-based technologies have the advantages of a high breakdown voltage, cutoff frequency, low noise figure, higher output power, and semi-insulating substrate. Furthermore, a package technique is an important key for high-frequency circuits. The flip-chip technique is demonstrated that the performances of V-band amplifiers with and without flip-chip are almost the same. In Chapter 2, three kinds of Ka/Ku-band Gilbert mixers are demonstrated using pHEMT technology. Thanks to the semi-insulating GaAs substrate, microwave passive components have a low-loss feature, and polyphase filters work up to higher frequencies. Highly accurate Tantalum Nitride (TaN) thin film resistors utilized in polyphase filters result in perfect quadrature operation. Therefore, our proposed single-sideband up-converter operates at 15 GHz with a 63-dB sideband rejection ratio, and another 34-GHz I/Q subharmonic down-converter reaches < 0.4-dB magnitude and < 1° phase errors. More than 50-dB LO leakage suppression is achieved in the I/Q subharmonic mixer. On the other hand, a 40-GHz stacked-LO subharmonic mixer with a novel compensation technique is also proposed and demonstrated to improve LO speed and reduce the amount of transistors as compared to the previous work. Chapter 3 makes a comparison between Q-band 0.15 μm pHEMT and mHEMT stacked-LO subharmonic upconversion mixers in terms of gain, isolation and linearity. In general, a 0.15 μm mHEMT device has a higher transconductance and cutoff frequency than a 0.15 μm pHEMT does. Thus, the conversion gain of the mHEMT is higher than that of the pHEMT in the active Gilbert mixer design. The Q-band stacked-LO subharmonic upconversion mixers using the pHEMT and mHEMT technologies have conversion gain of -7.1 dB and -0.2 dB, respectively. The pHEMT upconversion mixer has an OIP3 of -12 dBm and an OP1dB of -24 dBm, while the mHEMT one shows a 4 dB improvement on linearity for the difference between the OIP3 and OP1dB. In Chapter 4, the V-band coplanar waveguide (CPW)-microstrip line (MS)-CPW two-stage amplifier with the flip-chip bonding technique is demonstrated. The CPW is used at input and output ports for flip-chip assemblies and the MS transmission line is employed in the interstage to reduce chip size. This two-stage amplifier employs transistors as the CPW-MS transition and the MS-CPW transition in the first stage and the second stage, respectively. The CPW-MS-CPW two-stage amplifier has a gain of 14.8 dB, input return loss of 10 dB and output return loss of 22 dB at 53.5 GHz. After the flip-chip bonding, the measured performances have almost the same value. A 60 GHz single-chip receiver MMIC using 0.15-μm mHEMT technology is demonstrated in Chapter 5. The receiver consists of an LO multiplier chain, a 60 GHz three-stage low noise amplifier, and 60 GHz image rejection diode mixer. The LO chain is formed with a tripler and a 28 GHz three-stage feedback amplifier. Furthermore, the 60 GHz image rejection mixer is a symmetrical subharmonic diode mixer and integrated with IF and 3 × LO quadrature hybrids. The mHEMT receiver has the conversion gain of 4 dB, the noise figure of 7.0 dB, and the image rejection ratio of 22 dB at 60 GHz. The -24 dBm IP1dB and -16 dBm IIP3 are measured. Chapter 6 reports a Ka-band quadrature-output divide-by-two Miller divider using the 0.15-μm pHEMT technology. The circuit topology consists of one Marchand balun, two active multipliers and LC-tank filters with a positive feedback loop. The divider includes a single side-band (SSB) up-converter to verify the quadrature accuracy of the divider’s outputs. A 35-dB side-band rejection ratio is achieved. The minimum input sensitivity equals 2.7 dBm. The stable division from 32 to 36 GHz in a bandwidth of 12 % can be obtained.