| Summary: | 碩士 === 國立成功大學 === 製造工程研究所碩博士班 === 97 === In the era of the knowledge economy, the application of the electronic products is becoming more extensive. With the shortening of products life cycle and diversification of customer’s demand, IC packaging industry must promote the technological ability of packaging constantly that is in order to deal with intense competition pressure gradually in the future. Furthermore, IC industry is oriented towards manufacturing and service that the key competitiveness is service level.
This paper develops a new dispatching rule, measures the lot loss integrity exposure in order to adjuste the sublots sequence. The proposed procedure is illustrated to begin defining the logic of a new dispatching rule, to describe the product line by using simulation tool, and to experiment the dispatching rules for implementing the improved alternative.
Empirical results show that the cycle time and wait-to-batch time performances of the proposed methodology are usually better than the conventional dispatching rules. This paper considers four performance measure including cycle time, mean tardiness, service level and wait-to-batch time. In order to improve the performances of the whole production, the research applies multiple criteria decision-making method to decide the suitable dispatching rules for bottleneck workstations.
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