POP IC Package Warpage Analysis

• Main Authors: Ming-Tse Hung, 洪銘澤
• Other Authors: Sheng-Jye Hwang
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/73196896642703200274

碩士 === 國立成功大學 === 機械工程學系專班 === 97 === In IC assembly manufacturing, the IC package would be heated for completing final SMT process. It would causes warpage problem if it remaining strain or stress in inside of package. For IC package, the remaining stress and strain would make warpage become worse and damage package due to the CTE of different materials and heating impact. Therefore, to control the warpage situation of IC package is the major subject for assembly technology. The reason is it would impact the process yield, electricity, reliability…etc. The worst case would damage chip and makes IC function failed. In this research, we will study the warpage of POP BGA package and possible situation in a raise temperature. The thickness of POP BGA is only half of normal PBGA package (0.6~0.85 mm) since normal BGA would mount on it (that’s why we call it POP BGA). Besides normal SMT process on PCB, the POP BGA will have the other SMT process for topside package mounted. In SMT process, it need to heat IC package and the heat will cause SMT failed, poor electricity or reliability failed if it remained stress or strain in in side of package. So the warpage or coplanarity specification would be more tighten then normal BGA. We will use two kinds of molding compound on two samples which has different CTE and then to measure wapage situation in a raise temperature by Shadow Moiré. And to simulate the POP BGA warpage situation by ANSYS, to study the stress/strain distribution in package for trying to find out a method to predict/control warpage and improving the POP BGA warpage situation in this research.