Design and Implementation of Ultra Low Power Transformer-Based Oscillators for Multi-Standard Carrier Generators

• Main Authors: Shang-Hsun Wu, 吳尚勳
• Other Authors: Tzuen-Hsi Huang
• Format: Others
• Language: en_US
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/29003119490076366481

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 97 === This thesis presents a multi-standard carrier frequency planning synthesizer for 802.11a/g and MB-OFDM UWB co-existent applications. We mainly research in the solution of the low dc power dissipation for the needed 7-GHz band quadrature signal generator in the proposed carrier generation system in this thesis. It mainly adopts critical techniques including both the transformer-coupled and the current-reused to achieve high performance oscillators. Firstly, the plane transformer is analyzed in this thesis. A fully symmetric differential transformer structure is proposed to increase mutual magnetic coupling factor through the secondary coil interlaced among the primary coil. In addition, the secondary coil is paralleled cross-connection to reach symmetry and appropriate turn ratio. The measured characteristics of proposed fully transformer are compared with other structures in chip testkey. Secondly, the novel voltage-controlled oscillators (VCOs) are implemented to achieve low phase noise under lower dc power consumption by the proposed fully symmetric transformer combination of the current-reused cross-coupled core. They include the transformer-feedback current-reused differential VCO and the transformer series-coupled current-reused quadrature VCO. These chips are fabricated by TSMC 0.18 μm CMOS process. The principle and design consideration of these circuit are described completely in thesis. In the following, we discussed the measured results of three oscillators. The low power consumption wideband differential VCO can operate from 7.07GHz to 8.46 GHz. It has the 1.39 GHz (17.9 % tuning ratio) frequency tuning range When the VCO operating at 8.1 GHz with the output power is -8.45 dBm, and the measured phase noise at 1-MHz offset is -112.05 dBc/Hz. The power consumption of the VCO core circuit is 2.16 mW at 1.5 V supply voltage. The quadrature VCO with low power consumption and high performance can operate from 7.1GHz to 7.62 GHz. It has 510 MHz bandwidth. When the QVCO operating at 7.26 GHz with the output power is -10.63 dBm, and the measured phase noise at 1-MHz offset is -111.4 dBc/Hz. The power consumption of the QVCO core circuit is 1.58 mW at 1 V supply voltage. Phase deviation is less than 1 degree. The K-Band quadrature VCO with low power consumption and high performance can operate from 21.75 GHz to 22.28 GHz. It has 525 MHz bandwidth. When the QVCO operating at 21.8 GHz with the output power is -14.35 dBm, and the measured phase noise at 1-MHz offset is -102.5 dBc/Hz. The power consumption of the QVCO core circuit is 3.9 mW at 1.5 V supply voltage. Finally, the appendix A is novel true single-phase clocked quadrature divide-by-three circuit. It is mainly applied in the desired divide-by-three block of the proposed 802.11a/g and MB-OFDM UWB co-existence carrier system. This technology is also applied to the any multi-standard carrier frequency planning. According to the measured results, this circuit can achieve divide-by-three function and have the quadrature phase waveforms close to 50% duty-cycle pulse width.