Design and Implementation of Compact Ka-Band Transceiver MMIC Chips and Passive Circuits

• Main Authors: Pramod Singh, 辛柏克
• Other Authors: Yeong-Her Wang
• Format: Others
• Language: en_US
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/47812473497051545141

博士 === 國立成功大學 === 微電子工程研究所碩博士班 === 97 === The design and implementation of the compact MMIC chips for Ka-band transceiver applications as well as RF passive circuits are performed. The study includes Ka-band MMIC chips such as integrated up-converters, integrated downconverter, two-stage and four-stage power amplifiers, and PCB circuits such as dualband filters, UWB filter, and power divider. The design of integrated compact up-converter MMIC is performed to achieve low cost and high performance transmitter system for the Ka-band frequency applications. It is designed using anti-parallel diode pair sub-harmonic single sideband mixer and three stage RF (radio frequency) amplifier. The chip is operated for the wide bandwidth of 22-38 GHz. Due to sub-harmonic mixing the required local oscillator frequency (LO) is reduced to half (10-19 GHz) to that of the RF frequency. The conversion gain of the chip is 9-15 dB and P-1dB output power is 7-12 dBm. The single sideband and anti-parallel diode pair suppress the in-band unwanted sideband and second harmonic of the local oscillator (2LO), respectively. The suppression of sideband and 2LO signals is typically 20-35 dB and 20-30 dB, respectively. The size of the chip is as compact as 4.2 mm2 on a 100 μm-thick GaAs substrate. The design of the second integrated up-converter MMIC chip is also performed with miniature chip size of only 2.8 mm × 0.8 mm. This chip is also integrated LO amplifier to reduce the LO power requirement below 0 dBm. The conversion gain of the circuit is 12-14 dB for 27-37 GHz and sideband suppression of 20-27 dB. The P-1dB output power is 11 dBm and OIP3 is above 20 dBm. For the receiver application an integrated compact down-converter MMIC chip is designed. It is integrated anti-parallel diode pair sub-harmonic image reject mixer and RF low noise amplifier. The quasi-lumped circuit components are employed in circuit design for the compact chip size. The measured conversion gain of the chip is 10-14 dB, image rejection above 20 dBc, and noise figure 3.5-4.5 dB for the RF frequency of 29-36 GHz. The size of the chip is as compact as 2.24 mm2. The study by design and implementation of Ka-band power amplifier MMICs is also performed. A two-stage power amplifier in 0.15 μm pHEMT technology shows small signal gain above 12 dB and output power of 29 dBm at 31 GHz. Another four-stage power amplifier MMIC in 0.25 μm pHEMT technology is also implemented for higher gain and power in Ka-band frequency. The measured small signal gain of four-stage power amplifier is greater than 20 dB and power of 1.9 W at 27 GHz. The research on some RF passive circuits implemented on PCB (printed circuit board) is also performed for wireless applications. This includes dualband filters, UWB (ultra wideband filter), and power divider. The compact dualband filter with wide upper stopband using folded stepped impedance resonators (SIRs) and open stub is accomplished. The wide stopband is useful for the suppressing harmonics and noise in the RF circuits. Dualband filters at frequencies of 2.45/5.25 GHz and 2.45/5.75 GHz are realized with wide and deep upper stopband as well as deep mid-stopband. The size of the filters are less than 190 mm2 on a RO 4003C (ε r= 3.38, h = 0.81 mm) substrate. A miniature dual-band filter using quarter wavelength (λg/4) stepped impedance resonators (SIRs) is also proposed. Short and open SIRs are coupled together to realize lower and upper passbands, respectively. The circuit is miniaturized due to the use of λg/4 resonators and their comb-line coupling. The filters at frequencies of 2.45/5.25 GHz and 2.45/5.75 GHz are as compact as 19.0×5.2 mm2 on a RO 4003C (ε r= 3.38, h = 0.81 mm) substrate. The design and implementation of a planar ultra wideband (UWB) bandpass filter (BPF) is achieved too. Three interdigital edge coupled microstrip lines and stepped impedance open stub are used for realizing the UWB filter. A passband from 3.1 – 10.6 GHz is achieved with low insertion loss of 0.5 dB, a return loss of about 18 dB, a sharp out-of-band-rejection, and a low group delay of only 0.21 ns. The design of the filter is simple, and it shows good frequency response. Finally a coupled line power divider is proposed for the compact size and bandpass applications. The layout size of the divider is reduced in comparison to conventional Wilkinson divider. The divider provides bandpass response similar to single stage coupled line bandpass filter.