| Summary: | 碩士 === 國立中興大學 === 電機工程學系所 === 97 === In this thesis, RF characteristics of multi-finger (MF) type MOSFET have been analyzed. This work studied the relationship between small-signal model of P-type MOSFET and layout geometry. The impact factors of gate resistance of MOSFET could involve two main items, the first one is the modified geometry factor which includes layout parameters and transmission line (TML) effect; Secondly, the material nature of poly-silicon and non-quasi static (NQS) effect would affect the effective gate sheet resistance. In addition, while the operation frequency was increasing continuously, the substrate loss exhibits an important influence obviously. Therefore, the helpful layout guides were also addressed and it could easily handle the magnitude of substrate network elements. Consequently, two figures of merit (FoMs) of MOSFET, cut off frequency and maximum oscillation frequency, were used to compare three different layout types, and induced some comprehensive geometry parameters for acquiring high FoM.
The other researching topic is a methodology of design robust voltage-controlled oscillator (VCO). This literature proposed a design concept to compromise both power consumption and phase noise. Thus, two important parameters of LC tank which are equivalent loss conductance and effective resistance were found to get an optimal design. Finally, a practical chip has been completed on TSMC 0.18um 1P6M process, the measured results showed that the oscillator works the frequencies from 8.30GHz to 9.63GHz with phase noise -115.06dBc/Hz at 1MHz offset, and dissipates 14.76mW power.
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