Summary: | 博士 === 義守大學 === 電機工程學系博士班 === 97 === Placement of multiple dies on an electronic component substrate is a difficult combinatorial task in which multiple criteria need to be considered simultaneously to obtain a true multi-objective optimization. Our design methodologies consider multi-objective component placement including thermal reliability, signal integrity and area cost criteria. For thermal reliability considerations, the design methodology focuses on the placement of the power dissipating components to achieve uniform thermal distribution. A good placement can reduce the maximum temperature effect and increase the component life time. For signal integrity consideration, the objective is to reduce routing length and minimize the signal distortion and loss. A good routing can reduce the complexity of routing with smaller number of via and high quality of signal integrity. For the area cost consideration, the main concern is to obtain a minimum substrate area. The smaller substrate area can not only reduce the product cost, but also be competitive for the upcoming novel smaller product requirements. The cost of each different objective is normalized by selection of each corresponding individual m value in S and Z functions common used in the Fuzzy logic. The optimal solution of a placement is to minimize a weighted sum of some objectives criteria subject to constraints on others. The optimal multi-objective solutions are then obtained by several algorithms, such as the small perturbation method, the simulated annealing (SA) algorithm, and the hybrid optimization GASA algorithm (namely the combination of genetic algorithm and simulated annealing), respectively. An auto-generated layout based on the optimization solution of the multi-criterion placement is also developed in this work. A 3-D finite element analysis of the thermal distribution is constructed to investigate the efficiency of the optimization strategy. The proposed automated system is apply to different design cases including multi-chip module, printed circuit board, and the multi-layer substrate with embedded passive components.
For component placement on printed circuit board design, an efficient placement method is further developed for non-rectangular substrate. The weighted sum and the implemented results by the automatic placement method are compared with the real case. The results of the thermal distribution are further verified by the infrared thermal imaging taking from the real case. In embedded-passives within multi-layer substrate design case, routing in 3D dimension through via connection is discussed. The proposed automated system enables simultaneously considering the multi-objective effect to forecast or generate a floor plan design for electronic module design including MCM, PCB, and multilayer substrate. The auto-generated floor plan design is demonstrated to have the capability to meet the custom request multi-objective criterion based on the initial user’s define weighting factor.
To meet the high I/O pin count, a methodology of redistributing IO from bond pads on the periphery of an integrated circuit (IC) to an area array of sold bumps for BGA packages is proposed. The proposed I/O pad redistribution methodology for depopulated area array BGA package design makes it possible to quickly examine the property for the conversion between peripheral and area array formats.
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