Design and Implementation of Adaptive Fuzzy Iterative Learning Controller Using FPGA Chip

• Main Authors: Chen-Kun Lee, 李承錕
• Other Authors: Chiang-Ju Chien
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/97013350167858282120

碩士 === 華梵大學 === 電子工程學系碩士班 === 97 === This thesis studies the design of iterative learning controller for discrete time nonlinear systems. The first part of this thesis investigates the learning performance of the proposed discrete time iterative learning controller. Under both conditions of zero initial state error and nonzero initial state error, we show the convergence of the iterative learning system by using sup-norm approach. As the error convergence and learning performance are highly related to the learning gain, the second part of this thesis presents a design concept by using fuzzy logic system to implement the learning again. The proposed method has significant improvement on the speed of learning convergence and learning performance. In addition to the theoretical analysis, we use computer simulations to demonstrate that the learning convergence of the proposed approach is better than the traditional one. In addition to Matlab simulations for demonstration of performance, the proposed adaptive fuzzy iterative learning controller is also realized by a digital circuit. The designed circuit consists of four parts, including iterative learning control circuit, fuzzy logic learning gain circuit, register circuit and main control unit. We use VHDL as the design tool and implement the circuit in an FPGA chip. In order to verify the correctness of the circuit, we utilize a hardware interface to connect the FPGA chip and the PC computer such that we can execute the closed loop control experiment. Compared with the MATLAB simulation results, we conclude that the designed circuit is correct and feasible.