Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process
碩士 === 逢甲大學 === 通訊工程所 === 97 === In recent years, the development of the internet has made the existing network structures insufficient. Many factories are developing methods to improve this problem. The main method is worldwide interoperability for microwave access (WiMAX). WiMAX is a new wireless...
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ndltd-TW-097FCU056500092015-11-13T04:09:16Z http://ndltd.ncl.edu.tw/handle/90118568165370964234 Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process 利用CMOS0.18製程之射頻降頻器電路的設計與製作 Hao-Chih Hsu 許豪志 碩士 逢甲大學 通訊工程所 97 In recent years, the development of the internet has made the existing network structures insufficient. Many factories are developing methods to improve this problem. The main method is worldwide interoperability for microwave access (WiMAX). WiMAX is a new wireless wideband technology; it has a 75 Mbps data rate to transmit information; its transmission coverage range is 50 kilometers. This technique can offer wide bandwidth, nomadic access for point to point (PTP) and point to multipoint (PMP) applications. Because of above mention, this thesis is aimed at wireless network technology and designed one of the key building blocks in radio frequency communication transceivers. The proposed LNA and mixer were implemented based on TSMC standard 0.18 �慆 RF CMOS process. From the design flow, circuit simulation, layout of circuit, and measured of chip have been described completely. In first circuit, we designed fully integrated 2-6 GHz two stages LNA structures; we employed the resistive shunt-feedback, simplified band-pass filter circuit to achieve wide input impedance matching. In addition, the gain stage amplifier adopts cascode structure to implement amplifier stage. The measured input return loss (S11) was less than -10.9 dB over 2-6 GHz range. The maximum power gain (S21) was 16.4 dB and the minimum noise figure was 4.1 dB for 2-6 GHz. The 1 dB gain compression performance was approximate -15 dBm. The bias current were the first stage circuit 8.54 mA and the second stage circuit 4.15 mA by a 1.1 V and the power consumption was 14.5 mW. In second circuit the circuit structure of the proposed mixer consists of Gilbert cell, active balun and the IF buffer amplifier. This study, HtheH HchiefH improved traditional Gilbert cell mixer structure, changing the passive load to the active load, and than using the active balun and buffer to change the differential single to the single-end single. Than we can use the active load and active balun to increase the conversion gain. Finally, at the operation voltage of Vdd = 1.8 V, RF frequency was 3.5 GHz, LO frequency was 3.12 GHz, the conversion gain was about 12.3 dB, input P1dB and power consumption were about -18 dBm and 17.6 mW. In tired circuit, we proposed an integrated down converter circuit, the circuit includes low noise amplifier and mixer. The low noise amplifier of output employs active balun for phase different 180 degree. The circuit structure of the proposed mixer consists of common-gate transconductance stage, mixer cord stage and the IF buffer amplifier. The whole circuit of conversion gain was 19.55 dB, input return loss was -18.36 dB, a noise figure was 4.025 dB, 1-dB compression point was -30 dBm, an LO-IF isolation was 64.4 dB, an LO-RF isolation was 133.6 dB, an RF-IF isolation was 83.27 dB. The total power consumption was 36.1 mW. Man-Long Her 何滿龍 2009 學位論文 ; thesis 104 en_US |
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碩士 === 逢甲大學 === 通訊工程所 === 97 === In recent years, the development of the internet has made the existing network structures insufficient. Many factories are developing methods to improve this problem. The main method is worldwide interoperability for microwave access (WiMAX). WiMAX is a new wireless wideband technology; it has a 75 Mbps data rate to transmit information; its transmission coverage range is 50 kilometers. This technique can offer wide bandwidth, nomadic access for point to point (PTP) and point to multipoint (PMP) applications. Because of above mention, this thesis is aimed at wireless network technology and designed one of the key building blocks in radio frequency communication transceivers.
The proposed LNA and mixer were implemented based on TSMC standard 0.18 �慆 RF CMOS process. From the design flow, circuit simulation, layout of circuit, and measured of chip have been described completely. In first circuit, we designed fully integrated 2-6 GHz two stages LNA structures; we employed the resistive shunt-feedback, simplified band-pass filter circuit to achieve wide input impedance matching. In addition, the gain stage amplifier adopts cascode structure to implement amplifier stage. The measured input return loss (S11) was less than -10.9 dB over 2-6 GHz range. The maximum power gain (S21) was 16.4 dB and the minimum noise figure was 4.1 dB for 2-6 GHz. The 1 dB gain compression performance was approximate -15 dBm. The bias current were the first stage circuit 8.54 mA and the second stage circuit 4.15 mA by a 1.1 V and the power consumption was 14.5 mW.
In second circuit the circuit structure of the proposed mixer consists of Gilbert cell, active balun and the IF buffer amplifier. This study, HtheH HchiefH improved traditional Gilbert cell mixer structure, changing the passive load to the active load, and than using the active balun and buffer to change the differential single to the single-end single. Than we can use the active load and active balun to increase the conversion gain. Finally, at the operation voltage of Vdd = 1.8 V, RF frequency was 3.5 GHz, LO frequency was 3.12 GHz, the conversion gain was about 12.3 dB, input P1dB and power consumption were about -18 dBm and 17.6 mW.
In tired circuit, we proposed an integrated down converter circuit, the circuit includes low noise amplifier and mixer. The low noise amplifier of output employs active balun for phase different 180 degree. The circuit structure of the proposed mixer consists of common-gate transconductance stage, mixer cord stage and the IF buffer amplifier. The whole circuit of conversion gain was 19.55 dB, input return loss was -18.36 dB, a noise figure was 4.025 dB, 1-dB compression point was -30 dBm, an LO-IF isolation was 64.4 dB, an LO-RF isolation was 133.6 dB, an RF-IF isolation was 83.27 dB. The total power consumption was 36.1 mW.
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author2 |
Man-Long Her |
author_facet |
Man-Long Her Hao-Chih Hsu 許豪志 |
author |
Hao-Chih Hsu 許豪志 |
spellingShingle |
Hao-Chih Hsu 許豪志 Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process |
author_sort |
Hao-Chih Hsu |
title |
Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process |
title_short |
Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process |
title_full |
Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process |
title_fullStr |
Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process |
title_full_unstemmed |
Design and Implementation of the RF Down Converter Circuit Using the CMOS 0.18 µm Process |
title_sort |
design and implementation of the rf down converter circuit using the cmos 0.18 µm process |
publishDate |
2009 |
url |
http://ndltd.ncl.edu.tw/handle/90118568165370964234 |
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