Summary: | 碩士 === 大葉大學 === 資訊工程學系碩士班 === 97 === The traditional residence surveillance system only can continuously capture all images (including normal images and abnormal ones) at all times. However, because of continuously capturing of images, the degree of difficulty of treatment increased after the invasion happens, and monitoring system efficiency is often limited to the hardware equipment of the monitoring system.
This research proposed an intelligent image sensor (IIS) designed by FPGA hardware. The proposed IIS provides a function that distinguishes abnormal images instantly. The system could act immediately when it detects any unusual activities such as illegal invasion or intentional destruction. The proposed IIS designed by FPGA is an independent hardware equipment, and all identification courses carry out by the hardware, so can improve systematic efficiency effectively, improve the monitoring system efficiency of the traditional type.
This system is compiled by the hardware Altera FPGA with software Quartus II, Design Compiler, SOCEncounter, and TetraMax, completing Cell Base. When the system is turned into IC in the future, the detecting ability will be enhanced, basic cost of the whole surveillance system will be lowered, and storing mechanism will be done more efficiently.
Key Words : FPGA, Cell Base, Intelligent Image Sensor, Image Identification
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