Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation
碩士 === 長庚大學 === 電子工程學研究所 === 97 === Conventional Flash memory device is using continues floating gate as a storage units, which have many application in electrical products, including cell phone, i-pod and digital camera. There are some serious issues in operation voltage, device scaling and retenti...
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ndltd-TW-097CGU054280412015-10-13T12:04:56Z http://ndltd.ncl.edu.tw/handle/51216344259857911288 Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation 利用雙濺鍍鎢/矽與氧化處理之鎢奈米晶記憶體研究 Wen Huai Lee 李文懷 碩士 長庚大學 電子工程學研究所 97 Conventional Flash memory device is using continues floating gate as a storage units, which have many application in electrical products, including cell phone, i-pod and digital camera. There are some serious issues in operation voltage, device scaling and retention time. In this thesis, we use NCs memory device to overcome convention flash memory’s problem. The NCs flash memory devices use isolated nano dots as a storage unit in the dielectrics, it can decrease the tunnel oxide thickness and have lower operation voltage. In this study, we use sputter system to co-sputter the silicon and tungsten target, following oxidation to form the tungsten NCs embedded in the SiO2. Next, we use different oxidation treatment to optimize the tungsten NCs. Our phical analysis will measurement by XRD (X-ray Diffraction), XPS (X-ray Photoelectron Spectroscope), SIMS (Secondary Ion Mass Spectrometer), TEM (Transmission electron microscopy. The electrical analysis such as, C-V characteristics, retention time and endurance are investigated by HP4285. C. S. Lai J. C. Wang 賴朝松 王哲麒 2009 學位論文 ; thesis 74 |
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碩士 === 長庚大學 === 電子工程學研究所 === 97 === Conventional Flash memory device is using continues floating gate as a storage units, which have many application in electrical products, including cell phone, i-pod and digital camera. There are some serious issues in operation voltage, device scaling and retention time. In this thesis, we use NCs memory device to overcome convention flash memory’s problem.
The NCs flash memory devices use isolated nano dots as a storage unit in the dielectrics, it can decrease the tunnel oxide thickness and have lower operation voltage. In this study, we use sputter system to co-sputter the silicon and tungsten target, following oxidation to form the tungsten NCs embedded in the SiO2. Next, we use different oxidation treatment to optimize the tungsten NCs. Our phical analysis will measurement by XRD (X-ray Diffraction), XPS (X-ray Photoelectron Spectroscope), SIMS (Secondary Ion Mass Spectrometer), TEM (Transmission electron microscopy. The electrical analysis such as, C-V characteristics, retention time and endurance are investigated by HP4285.
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author2 |
C. S. Lai |
author_facet |
C. S. Lai Wen Huai Lee 李文懷 |
author |
Wen Huai Lee 李文懷 |
spellingShingle |
Wen Huai Lee 李文懷 Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation |
author_sort |
Wen Huai Lee |
title |
Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation |
title_short |
Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation |
title_full |
Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation |
title_fullStr |
Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation |
title_full_unstemmed |
Optimization of W-Nanocrystal Memories by Co-Sputtering of W/Si and Post-Oxidation |
title_sort |
optimization of w-nanocrystal memories by co-sputtering of w/si and post-oxidation |
publishDate |
2009 |
url |
http://ndltd.ncl.edu.tw/handle/51216344259857911288 |
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