Front-end Baseband Circuit Design for IEEE 802.11n System with Cyclic Delay Diversity

碩士 === 國立中正大學 === 通訊工程研究所 === 97 === As the wireless local area network (WLAN) prevails, the MIMO-OFDM technique attracts much attentions in recent year. The IEEE 802.11n Draft 4.0 was ratified in August 2008. It defines the maximum number of transmit antennas to be four and adopts the cyclic delay...

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Bibliographic Details
Main Authors: Jyun-Yu Wang, 王鈞昱
Other Authors: Tsung-Hsien Liu
Format: Others
Language:zh-TW
Online Access:http://ndltd.ncl.edu.tw/handle/75559852040140818221
Description
Summary:碩士 === 國立中正大學 === 通訊工程研究所 === 97 === As the wireless local area network (WLAN) prevails, the MIMO-OFDM technique attracts much attentions in recent year. The IEEE 802.11n Draft 4.0 was ratified in August 2008. It defines the maximum number of transmit antennas to be four and adopts the cyclic delay diversity (CDD) technique for its transmitted preamble and payload. In this thesis, we study the advantages of using this CDD technique in the 4-by-4 11n WLAN. We also design the front-end baseband receiver from algorithms to hardware architectures. Our designed receiver contains modules of energy detection, frequency synchronization, and timing synchronization. The designed hardware is written in Verilog codes, synthesized, and function verified by Xilinx ISE. The simulation waveform of each hardware module is demonstrated to agree with the floating-point simulation results performed in the MATLAB environment. Finally, the designed hardware circuits are downloaded to and verified by FPGA.