Design of the Reconfigurable Butler Matrixes and Phased-Array Receiver MMICs

• Main Authors: Yu-Wei Chang, 張育維
• Other Authors: Chia-Chan Chang
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/22086378316983764219

碩士 === 國立中正大學 === 電機工程所 === 97 === This thesis is aimed to design the reconfigurable beam-forming circuitries based on Butler matrix for the smart antenna system. Three chips were proposed and designed using TSMC CMOS 0.18-μm technology to either enhance the operation bands or spatial resolution without increasing the order of Butler matrix. The first one is a switchable dual-band Butler matrix. The required quadrature hybrid was realized in equivalent lumped elements with making compensation between 2.4 GHz and 5.2 GHz. According to the primary testing results of the quadrature hybrid, the band-switching functionality was successfully verified but with slightly frequency shift. Thus the implemented Butler matrix is designed for 2.45/4.85 GHz with chip size of 1.58 × 1.62 mm2. The second Butler matrix is targeting on the resolution issue. By switching the phase shifters and exchanging the order of output ports, six individual beams can be produced from a 4-way Butler matrix. This chip was designed at 5.8 GHz with circuit area of 1.29 × 1.39 mm2. 　　The last chip is a low-power, 24-GHz Butler matrix-based phased-array receiver. Similar works in existing literatures are mainly designed by active circuits, whereas ours is employing passive Butler Matrix to save power consumption. Moreover, this circuit utilized multi-port combination technology, resulting in the scanning range from -90 ° ~ 90 °. The measured results show that system gain is 10.7∼11.2 dB, system power consumption is less than 46.8 mW, spatial resolution is 15°, and the chip size is 1.98 × 2.08 mm2.