An Implementation of Completely Fair Scheduler on a QoS Supported SMT Processor

碩士 === 國立中正大學 === 資訊工程所 === 97 === Simultaneous Multithreading (SMT) is an architecture that allows multiple threads run simultaneously and share internal resources in single CPU core. By exploit thread level parallelism, SMT can increase CPU utilities and throughputs. Recently, more and more resear...

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Bibliographic Details
Main Authors: Chih-Ying Lin, 林志穎
Other Authors: Shi-Wu Lo
Format: Others
Language:zh-TW
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/63171415571333763739
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Summary:碩士 === 國立中正大學 === 資訊工程所 === 97 === Simultaneous Multithreading (SMT) is an architecture that allows multiple threads run simultaneously and share internal resources in single CPU core. By exploit thread level parallelism, SMT can increase CPU utilities and throughputs. Recently, more and more researches topics discuss how to obtain better performance and reduce power consumption for embedded system by apply SMT. However, the execution time in SMT processors is hard to expect due to the CPU resource competition. If we cannot predict worst case execution time (WCET) correctly in real-time systems, it’s hard to reach an effective schedule. To solve this problem, we first propose a system design includes hardware and OS scheduler which can reduce/control the competition of CPU resources between running threads in SMT processor. The hardware design can adequately allocate the resource to satisfy the performance requirements of running applications . in other words, it has the ability to provide Quality of Service (QoS) guarantee for time critical systems. Finally, an OS scheduler is proposed to take the advantage of the hardware. This paper is summation of researches in our lab for recently years, some contents belong other’s research, which listed in Appendix B.