The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits

The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits

碩士 === 元智大學 === 通訊工程學系 === 96 === In this paper, we designed the high linearity power amplifiers that applying 2.4 GHz WLAN and 3.5 GHz WiMAX systems by monolithic microwave integrated circuit (MMIC) technology. The power amplifiers are implemented with TSMC 0.18 um CMOS and WIN 0.15 pHEMT processes...

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Main Authors: Chung-Chen Hsieh, 謝仲宸
Other Authors: 楊正任
Format: Others
Language:zh-TW
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/63411452807216750062
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spelling ndltd-TW-096YZU056500232015-10-13T13:48:21Z http://ndltd.ncl.edu.tw/handle/63411452807216750062 The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits 具相位補償電路之2.4GHz/3.5GHz高線性功率放大器之研製 Chung-Chen Hsieh 謝仲宸 碩士 元智大學 通訊工程學系 96 In this paper, we designed the high linearity power amplifiers that applying 2.4 GHz WLAN and 3.5 GHz WiMAX systems by monolithic microwave integrated circuit (MMIC) technology. The power amplifiers are implemented with TSMC 0.18 um CMOS and WIN 0.15 pHEMT processes. The power amplifiers employ class-AB topology to overcome the low efficiency when high linearity operated, and using linearizer in the PAs to maintain the high linearity. And we propose a modified circuit to complement the phase deviation of the CMOS cascade topology that could improve the linearity of the power amplifier. 楊正任 2008 學位論文 ; thesis 70 zh-TW
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language zh-TW
format Others
sources NDLTD
description 碩士 === 元智大學 === 通訊工程學系 === 96 === In this paper, we designed the high linearity power amplifiers that applying 2.4 GHz WLAN and 3.5 GHz WiMAX systems by monolithic microwave integrated circuit (MMIC) technology. The power amplifiers are implemented with TSMC 0.18 um CMOS and WIN 0.15 pHEMT processes. The power amplifiers employ class-AB topology to overcome the low efficiency when high linearity operated, and using linearizer in the PAs to maintain the high linearity. And we propose a modified circuit to complement the phase deviation of the CMOS cascade topology that could improve the linearity of the power amplifier.
author2 楊正任
author_facet 楊正任
Chung-Chen Hsieh
謝仲宸
author Chung-Chen Hsieh
謝仲宸
spellingShingle Chung-Chen Hsieh
謝仲宸
The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits
author_sort Chung-Chen Hsieh
title The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits
title_short The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits
title_full The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits
title_fullStr The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits
title_full_unstemmed The Study and Implementation of 2.4 GHz / 3.5 GHz High Linearity Power Amplifier with Phase Compensative Circuits
title_sort study and implementation of 2.4 ghz / 3.5 ghz high linearity power amplifier with phase compensative circuits
publishDate 2008
url http://ndltd.ncl.edu.tw/handle/63411452807216750062
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