Antenna Effect Consideration for X-Architecture Clock Routing

• Main Authors: Feng-Tzu Hsu, 許峰慈
• Other Authors: Chia-Chun Tsai
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/etaq7j

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 96 === As the process technology dramatically grows up into nanometer regime, the problem of antenna effects on the routing process scheme cannot be neglected. In the plasma-based process, the antenna effect is a phenomenon of that much charge is accumulated on the longer metal wires which would cause the degradation of gate-oxide. The antenna effect also influences the reliability and manufacturing yield of circuits. Many related researches have proposed some algorithms to solve the problem of antenna effects, however they usually talk of the problem on general routing scheme. As the process technology continuously scales into small, the delay of interconnects critically influences the performance of clock routing. Compared with traditional Manhattan-architecture routing, the X-architecture routing becomes more popular. In this thesis, we propose the algorithm based on combining two methods of jumper insertion and layer assignment to eliminate antenna effects on an X-architecture clock routing. Experimental results for benchmarks show that our approach can reduce all the errors due to antenna effects. Compared with traditional jumper insertion strategy, our algorithm can save the penalties of up to 73.57%, 70.08%, and 73.98% in terms of vias, clock delay, and power dissipation, respectively.