Design and Implementation of FPGA-Based Single-Stage Flyback Converter

• Main Authors: Xian-Yuan Chiang, 江顯元
• Other Authors: 賴炎生
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/97c7km

碩士 === 國立臺北科技大學 === 電力電子產業研發碩士專班 === 96 === The objective of this thesis is to design and implement an FPGA-based single-stage flyback converter with power factor correction. Based upon the well known component placement and synchronous switching methods, the single-stage flyback converter with PFC is derived from its two-stage counterpart. The advantages of the designed and implemented single stage flyback converter with PFC include reduction of power devices and the related driver. This kind of converter becomes very promising for low power applications. The controller is realized using FPGA to provide programmable capability and digital control. The design specifications are: input voltage = 110 V/AC, 60 Hz, output voltage = 12 V/DC and the rated output power = 40 W. The small-signal model is derived for digital controller design. The derived model is confirmed by simulation and realized by FPGA. Experimental results show that the output voltage can be well regulated while keeping the input power factor greater than 95%. These results confirm the design and implementation.