A Super Gain-Flatness LNA for Ultra-Wideband from 3.1 to 10.6 GHz

• Main Authors: Chiu-Lung Shen, 沈秋龍
• Other Authors: Jenn-Sen Leu
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/55w626

碩士 === 國立臺北科技大學 === 電機工程系研究所 === 96 === In this thesis, we use the model of TSMC CMOS 0.18μm to design a simple receiver based on IEEE 802.15.3 specification. First of all, we design a LNA for ultra-wideband from 3.1 GHz to 10.6 GHz. Then we design a super gain-flatness low noise amplifier for ultra-wideband. Furthermore we improve this amplifier and design a multiple-gated low noise amplifier for ultra-wideband from 3.1 GHz to 10.6 GHz. The key technique is to improve its linearity. The simulation results of the super gain-flatness low noise amplifier (LNA) show that the power consumption is 13.09mW, the input return loss is less than -10.3dB, the output return loss is less than -13.4dB and the isolation is less than -78, respectively. Besides the power gain is from 11.8 to 13.7dB and gain flatness is reduced to 0.254. The noise figure locates on the range of 4.1 dB to 4.9 dB with -3dB bandwidth of 3.1 GHz to 10.6 GHz. The simulated P1dB and IIP3 are -11.77 dBm and -13.22dBm at 6 GHz, respectively. The simulation results of the multiple-gated low noise amplifier (LNA) show that the power consumption is 12.2mW, the input return loss is less than -12.3dB, the output return loss is less than -11.1dB and the isolation is less than -83, respectively. Besides, the power gain is from 11.5 dB to 13.4 dB and gain flatness is reduced to 0.245. The noise figure locates on the range of 3.8 dB to 4.7 dB with -3dB bandwidth of 3.1 GHz to 10.6 GHz. The simulated P1dB and IIP3 are -11.25 dBm and -13.28 dBm at 6 GHz, respectively.