1.2V 0.18μm Continuous-Time Sigma-Delta Modulator Chip Design for WiMAX Application

• Main Authors: Yu-Xian Lin, 林育賢
• Other Authors: Jhin-Fang Huang
• Format: Others
• Language: en_US
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/91139847172044970696

碩士 === 國立臺灣科技大學 === 電子工程系 === 96 === With the flourishing of personal wireless communications development, to achieve high resolution with high bandwidth and reduce power consumption, complexity of handheld wireless devices is very important. The analog-to-digital (A/D) conversion plays an important role in the system signal quality. WiMAX wireless communication uses Orthogonal Frequency Division Multiplexing (OFDM) to transfer high data rates. The standard offers flexible for long distance and high bandwidth between 1.25MHz to 20MHz. With the progress of personal wireless communications based on the considerations of extending battery life achieving high resolution with several MHz bandwidth applications and reducing system complexity, which are especially important for portable wireless devices. The analog-to-digital (A/D) converters play an important role in the system. Over-sampling sigma-delta analogue-to-digital converters (ADCs), which provide a robust and economical solution for high-resolution and wideband analog-to-digital conversion. There are several wideband sigma-delta modulators using the structure of the discrete-time (DT) switched-capacitor (SC) but with high unity-gain bandwidth (UGB) requirements on the amplifiers in SC integrators, it has been difficult to extend the signal bandwidth implementations of sigma-delta modulators beyond a few MHz while maintaining high resolution. In low voltage design, the SC circuits need clock bootstrap and high switch resistance limits the signal dynamic range and limits the sampling frequency. Continuous-time (CT) sigma-delta modulator can be used to solve these problems. In this thesis, we design and implementation a low voltage, wideband, continuous-time sigma delta modulator for WiMAX application. The modulator mainly contains active-RC integrator, feedback DAC, and excess loop delay and 4-bits quantizer operation at 160MHz. The modulator dissipates 10.1 mW at 1.2 V supply voltage and is fabricated in the TSMC 0.18 um 1P6M CMOS technology. Measurement results show the modulator achieves 66.9 dB SNR, a peak 62.9 dB SNDR and 75dB dynamic range over a 10 MHz band at an over-sampling ratio of 8.