Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing

碩士 === 國立臺灣科技大學 === 電子工程系 === 96 === This thesis is related to hardware/software co-design and verification of the algorithmic processors for image processing. The research work includes four parts. The first part is about software design of the image processing algorithms such as center and size fi...

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Main Authors: Chih-hsien Weng, 翁智賢
Other Authors: none
Format: Others
Language:zh-TW
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/96720386726092132758
id ndltd-TW-096NTUS5428003
record_format oai_dc
spelling ndltd-TW-096NTUS54280032016-05-18T04:13:35Z http://ndltd.ncl.edu.tw/handle/96720386726092132758 Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing 影像處理演算處理器之軟/硬整合設計與實現 Chih-hsien Weng 翁智賢 碩士 國立臺灣科技大學 電子工程系 96 This thesis is related to hardware/software co-design and verification of the algorithmic processors for image processing. The research work includes four parts. The first part is about software design of the image processing algorithms such as center and size finding, translation, scaling, rotation, and projection. The second part is to design and implement hardware processors for the algorithms mentioned above. The third part is to write the related drivers to integrate the algorithmic processors and the verification system together. The fourth part is about the verification and performance test of the related algorithmic processors. On the whole, the goal of this thesis is to design and develop various algorithmic processors for image processing. Meanwhile, a hardware/software co-design method is presented to improve the efficiency of both the design and verification flows. none 吳乾彌 2007 學位論文 ; thesis 74 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立臺灣科技大學 === 電子工程系 === 96 === This thesis is related to hardware/software co-design and verification of the algorithmic processors for image processing. The research work includes four parts. The first part is about software design of the image processing algorithms such as center and size finding, translation, scaling, rotation, and projection. The second part is to design and implement hardware processors for the algorithms mentioned above. The third part is to write the related drivers to integrate the algorithmic processors and the verification system together. The fourth part is about the verification and performance test of the related algorithmic processors. On the whole, the goal of this thesis is to design and develop various algorithmic processors for image processing. Meanwhile, a hardware/software co-design method is presented to improve the efficiency of both the design and verification flows.
author2 none
author_facet none
Chih-hsien Weng
翁智賢
author Chih-hsien Weng
翁智賢
spellingShingle Chih-hsien Weng
翁智賢
Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing
author_sort Chih-hsien Weng
title Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing
title_short Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing
title_full Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing
title_fullStr Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing
title_full_unstemmed Hardware/Software Co-design and Implementation of Algorithmic Processors for Image Processing
title_sort hardware/software co-design and implementation of algorithmic processors for image processing
publishDate 2007
url http://ndltd.ncl.edu.tw/handle/96720386726092132758
work_keys_str_mv AT chihhsienweng hardwaresoftwarecodesignandimplementationofalgorithmicprocessorsforimageprocessing
AT wēngzhìxián hardwaresoftwarecodesignandimplementationofalgorithmicprocessorsforimageprocessing
AT chihhsienweng yǐngxiàngchùlǐyǎnsuànchùlǐqìzhīruǎnyìngzhěnghéshèjìyǔshíxiàn
AT wēngzhìxián yǐngxiàngchùlǐyǎnsuànchùlǐqìzhīruǎnyìngzhěnghéshèjìyǔshíxiàn
_version_ 1718271262995775488