The Design and Verification of an ARM v4 Instruction Set Architecture Compatible Memory-Management-Unit IP
碩士 === 國立臺灣科技大學 === 電子工程系 === 96 === MMU, sometimes called “paged memory management unit”（PMMU）, is a computer hardware component responsible for handling accesses to memory requested by CPU. Its functions include address translation, access permission checks for instruction and data address, and me...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60592735992821194446 |