Development of a Laser Encoder Signal Processing system with Programmable Device

• Main Authors: Chi-Hui Liu, 劉奇惠
• Other Authors: Kuang-Chao Fan
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/18682873594486284125

碩士 === 國立臺灣大學 === 機械工程學研究所 === 96 === Along with constant development in high technology, fields like mechanical engineering, electrical engineering, and material engineering are heading to researches of high precision and high performance. Thus, this research offers the programmable device (embedded device) to improve better performance. By using Complex Programmable Logic Device (CPLD) to help Analog Digital Converter (ADC) sample the digital signal obtained from Interferometer’s analogical signal, Felid Programmable Gate Array (FPGA), with high speed operation, will process the retained digital data and immediately send the real displacement data back to control unit to further achieve higher performance. In respect of signal processing, signal correcting is based on first in first out (FIFO) architecture circuit. This method assures correct counting of periodic signal when signal is decaying caused by interferometer. Also, FIFO architecture is used to correct DC draft in real time. To verify the theoretical predictions and the overall system specifications of the system, the SIOS MI5000 laser interferometer is adopted as the calibration tool. Within the distance of 15mm, the measuring is conducted in a close chamber, a regular laboratory environment, without using conditions of temperature control, humidity control and anti-vibration. The maximum error is 25nm and the repeatability is below 20 nm.