| Summary: | 碩士 === 國立臺灣大學 === 電機工程學研究所 === 96 === In the modern electronic system, most parts of it are designed with digital integrated
circuits, but analog circuits still exist in the system since they are the bridges between
the digital circuits and human world. However, in the analog design flow, the
automation tools are still very immature. Therefore, the part of the analog design
has become the bottleneck of the whole mixed-signal design.
To reduce the mismatches of symmetry circuits in the analog circuits which
degrade their performance, the designer needs to consider many constraints during
layout generation. However, many parameters cannot be extracted directly by just
observing the layout polygons. For example, crosstalk noise of a net induced by
other neighboring nets needs complex computation, and the complex computation
is beyond the designers can handle.
In this thesis, we propose an analog circuit routing algorithm considering
wirelength minimization and crosstalk noise optimization with analog circuit constraints,
length matching and crosstalk matching constraints. We also provide a
crosstalk noise model which is suitable for analog circuits.
|
|---|
