Design of Low Power Content Addressable Memory Based on Voltage Compared Match Line Sense Amplifier
碩士 === 國立臺灣大學 === 電機工程學研究所 === 96 === This thesis presents a novel architecture for content-addressable memory with low power feature. This design is based on a proposed voltage compared match line sense amplifier that changes the comparison voltage of CAM word circuit. According to reducing cells o...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/51315143864808154269 |