| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 96 === By aggressive device scaling in modern integrated circuit technology, the computing ability of digital circuits increases significantly. But the low power supply and relative high threshold voltage of transistors exhibit design difficulties for analog circuit. Analog-to-digital converters provide the link between the analog and digital world. Due to their frequent use of analog and mixed analog-digital operations, A/D converters often appear as the bottleneck in data processing applications, limiting the overall speed or precision.
In this thesis, a 700-MHz 6-bit pipelined ADC with current-switching open-loop residue amplification and global-gain control is designed. Using a multiplexed-input architecture to implement T/H and MDAC circuits, transmission-gate switches are replaced by current-switching techniques. Without the need of digital calibration, a global-gain control technique is developed to eliminate the gain error. Fabricated in a 0.13-μm CMOS technology, the ADC consumes 24.1 mW from a 1.2-V power supply while the active area is only 0.052 mm2.
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