Hybrid Functional Verification Methodology for Alpha Processor Using RTL Symbolic Simulation
碩士 === 國立臺灣大學 === 電子工程學研究所 === 96 === Verification is an important part of the modern IC design, especially functional verification, which is responsible for 40% of the failure. There are two major verification methods that are being commonly used, simulation-based and formal approach. As the i...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/01916851080087150685 |