Micromachined RFIC by CMOS-Compatible ICP Deep Trench Technology

博士 === 國立臺灣大學 === 電子工程學研究所 === 96 === A novel micromachining technique, Deep Trench Technology, is invented to completely remove the lossy silicon underneath the inductors of RFICs by utilizing Inductively-Coupled Plasma etching (ICP). By means of the proposed technique, it is observed that the qual...

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Bibliographic Details
Main Authors: Tao Wang, 汪濤
Other Authors: Shey-Shi Lu
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/87744501138415175029
Description
Summary:博士 === 國立臺灣大學 === 電子工程學研究所 === 96 === A novel micromachining technique, Deep Trench Technology, is invented to completely remove the lossy silicon underneath the inductors of RFICs by utilizing Inductively-Coupled Plasma etching (ICP). By means of the proposed technique, it is observed that the quality factor of inductor is impressively increased, signal attenuation of a coplanar waveguide is reduced nearly to zero, mono-pole antenna exhibits a clearer resonance phenomenon, and isolation of substrate leakage can be enhanced as much as 32 dB. In addition to the passive devices, the approach is further applied to active circuits for practical applications. For the LNA operating at 5.4GHz, the noise figure is reduced by 0.5dB with the power gain raised by 2dB; the power gain of a distributed amplifier is increased by 1.06dB at 5.8GHz with a 0.87dB noise figure reduction; phase noise of a conventional 4GHz LC VCO is improved by 3dB. For a direct-conversion receiver front-end, the total noise figure is lowered by 2dB with a 1dB voltage gain enhancement, an additional 25.3dB LO-RF isolation and an extra 14dB LO rejection enhancement. The impacts of substrate removal upon the CMOS RFIC are quantified for the first time, which has paved a way for the future study toward the deeper understanding of the substrate loss.