An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process
碩士 === 國立清華大學 === 電機工程學系 === 96 === As the feature sizes in today’s semiconductor process become smaller, process variations have great influences on the performance of integrated circuit (IC). Evaluating IC’s performance before mass production is quite important and optical lithography is the key s...
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ndltd-TW-096NTHU54420402015-10-13T14:08:35Z http://ndltd.ncl.edu.tw/handle/09691820464113702440 An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process 快速估計微影製程中的特徵尺寸之空間影像模擬器 Ming-Chung Wu 吳明仲 碩士 國立清華大學 電機工程學系 96 As the feature sizes in today’s semiconductor process become smaller, process variations have great influences on the performance of integrated circuit (IC). Evaluating IC’s performance before mass production is quite important and optical lithography is the key step in modern semiconductor process. As a result, by optical lithography simulation, we can quickly examine the performance of the ICs affected by process variations and furthermore modify the design before fabrication. Aerial image simulation is the critical step in lithography simulation when determining the critical dimension (CD). We investigate various simulation models of aerial image and focus on the phenomenon of lens aberrations. Our model is based on Hopkins theory [1] which describes exposure system via transmission cross-coefficient (TCC) for partially coherent systems. We show the simulated aerial images agree well with the results from the simulator SPLAT [2]. A threshold resist model is then applied to determine the CDs. To improve the performance, our simulator is implemented to avoid calculations on low-intensity regions. Finally, several cell-level layouts are used for demonstrating out simulator. Jing-Jia Liou 劉靖家 學位論文 ; thesis 71 en_US |
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碩士 === 國立清華大學 === 電機工程學系 === 96 === As the feature sizes in today’s semiconductor process become smaller, process variations have great influences on the performance of integrated circuit (IC). Evaluating IC’s performance before mass production is quite important and optical lithography is the key step in modern semiconductor process. As a result, by optical lithography simulation, we can quickly examine the performance of the ICs affected by process variations and furthermore modify the design before fabrication. Aerial image simulation is the critical step in lithography simulation when determining the critical dimension (CD). We investigate various simulation models of aerial image and focus on the phenomenon of lens aberrations. Our model is based on Hopkins theory [1] which describes exposure system via transmission cross-coefficient (TCC) for partially coherent systems. We show the simulated aerial images agree well with the results from the simulator SPLAT [2]. A threshold resist model is then applied to determine the CDs. To improve the performance, our simulator is implemented to avoid calculations on low-intensity regions. Finally, several cell-level layouts are used for demonstrating out simulator.
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author2 |
Jing-Jia Liou |
author_facet |
Jing-Jia Liou Ming-Chung Wu 吳明仲 |
author |
Ming-Chung Wu 吳明仲 |
spellingShingle |
Ming-Chung Wu 吳明仲 An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process |
author_sort |
Ming-Chung Wu |
title |
An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process |
title_short |
An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process |
title_full |
An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process |
title_fullStr |
An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process |
title_full_unstemmed |
An Aerial Image Simulator for Fast Critical Dimension Estimation of Lithography Process |
title_sort |
aerial image simulator for fast critical dimension estimation of lithography process |
url |
http://ndltd.ncl.edu.tw/handle/09691820464113702440 |
work_keys_str_mv |
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