| Summary: | 碩士 === 國立清華大學 === 電機工程學系 === 96 === This thesis presents the design of a novel resolution-enhanced digitally controlled oscillator (DCO) for 2.4-2.5 GHz wireless RF applications, such as 802.11b/g or cellular phones. Instead of analog tuning scheme, the DCO adopts a novel switched-capacitor network that provides sufficient tuning frequency range with fine frequency resolution. Wide and precise linear frequency tuning is achieved through digital control of three capacitor arrays. The smallest capacitance step size is approximately 30 aF that achieves the resolution of 10 KHz. The frequency resolution can be further enhanced through high-speed dithering using a third-order Σ-Δ modulator, which transfer function is programmable. The designed DCO is implemented in TSMC 0.18 μm CMOS process, and the chip area is 0.99 × 0.98 mm2. According to the measurement results, the frequency tuning range is 147 MHz. The smallest frequency step controlled by the switched-capacitor is 29 KHz. The measured phase noise is less than -110 dBc/Hz at 500 KHz offset frequency. By activating the Σ-Δ modulator, the frequency resolution is further improved, which is small than 3 KHz. The power consumption is 3.4 mW with a 1.8 supply.
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